Design-Reuse

FPGA Implementation of DLX Microprocessor With WISHBONE SoC Bus

DLX is an open source microprocessor, it’s free and it has never been implemented in a commercial ASIC (Application Specific Integrated Circuit) design. The objective of this project is to use the ...
Electronic Design

Design Tool Streamlines SoC FPGA Application Creation

Xilinx’s SDSoC represents a major shift in support for SoC FPGAs. It opens FPGA development to software developers without requiring a major investment in time and effort to utilize the hardware ...
Electronic Design

Solutions Mitigate Mixed-Signal SoC Implementation Headaches

The concept of silicon realization, as defined in the Cadence EDA360 vision paper, represents everything required to produce a system-on-a-chip (SoC) design in silicon. 1 Silicon realization addresses ...
EDN

ARM-based SoC FPGAs

Altera Corporation today unveiled its family of ARM-based SoC FPGAs, integrating 28-nm Cyclone® V and Arria® V FPGA fabric, a dual-core ARM® Cortex™-A9 MPCore ...
Design-Reuse

Design and Implementation of an OCP-IP Compliant 64-Node Butterfly Network on Chip on Multi-FPGA

There is a growing demand of high-performance computing systems to cope with increasing data size and amount of arithmetic operation in various scientific computations. On top of this, several ...
EDN

Design planning for large SoC implementation at 40nm: Guaranteeing predictable schedule and first-pass silicon success

The physical design implementation of large complex deep sub-micron technologies has evolved to a stage where it is essential to consider every aspect of SoC design and implementation during the ...