Business Wire

Astera Labs First to Break Through the Memory Wall with Industry’s Highest Performance CXL Memory Controllers

SANTA CLARA, Calif.--(BUSINESS WIRE)--Astera Labs, the global leader in semiconductor-based connectivity solutions for AI infrastructure, today announced that its Leo Memory Connectivity Platform ...

XCENA raises $135M for its computational memory controller

XCENA Inc., a startup with a memory device designed to speed up artificial intelligence clusters, today announced that it has raised $135 million in funding. The Series B round was led by Korean funds ...
SiliconANGLE

Rambus targets AI memory bottlenecks with new HBM4E controller IP

Chip and silicon intellectual property technology company Rambus Inc. today announced HBM4E Memory Controller IP, a new solution that delivers breakthrough performance with advanced reliability ...
Embedded

High-bandwidth memory (HBM) options for demanding compute

Explosive growth of generative artificial intelligence (AI) applications in recent quarters has spurred demand for AI servers and skyrocketing demand for AI processors. Most of these processors — ...
Business Wire

Rambus Sets New Benchmark for AI Memory Performance with Industry-Leading HBM4E Controller IP

SAN JOSE, Calif.--(BUSINESS WIRE)--Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced the industry’s leading HBM4E Memory Controller IP, ...
Semiconductor Engineering

Redefining XPU Memory For AI Data Centers Through Custom HBM4: Part 3

This is the third and final of a series from Alphawave Semi on HBM4 and gives and examines custom HBM implementations. Click here for part 1, which gives an overview of the HBM standard, and here for ...