At process technologies of 0.13 µm and smaller, achieving timing closure for system-on-a-chip (SoC) designs becomes a slippery goal. Ever-tinier interconnects are packed closer together, yielding ...

Signal integrity is a critical design consideration in modern electronic systems, particularly those that depend on high-speed interconnects. As data rates climb and interconnect geometries become ...

SANTA CRUZ, Calif. — As a manager running AMP Inc.'s signal-integrity consulting business, Stan Harris was surprised by the high prices of commercial printed-circuit board signal-integrity analysis ...

Analyzing high speed datacom interfaces is an important task and ensures signal integrity. One major challenge of this analysis is the connection between the physical interface and the oscilloscope, ...

Improves PCIe design productivity using a smarter and streamlined workflow with simulation-driven virtual compliance test solutions Supports design exploration and report generation that speeds ...

To achieve gains in power, performance, area, and cost, 3D-IC architectures are pushing electronics design to new limits. Silicon integration technology and associated devices have undergone an ...

Qualitas Semiconductor has selected the ShockLine MS46524B from Anritsu Corporation to enhance signal integrity verification for its high-speed interface IP development.

For those of us who have been evangelizing signal integrity (SI) sign-off, something exciting happened in the first part of 2002. According to the second quarter 2002 EDA Consortium report, the market ...

The diversity of 3D multi-die design further complicates IP requirements. Common topologies, including face-to-face (F2F), ...

Qualitas Semiconductor Co., a developer specializing in PHY IP solutions for high-speed interconnects, has adopted Anritsu’s ...