The RISC-V Summit drew about 1,000 people to San Jose, California, this week to hear the latest on the open-source processor.

With Synopsys ARC-V Processor IP, customers will benefit from optimized and configurable implementations and the flexibility to leverage this extensive RISC-V ecosystem, which will help achieve their ...

RISC-V offers a level of flexibility to design new processors because the instruction set isn’t defined at the ISA level, but rather is the compilation of the processor and other ...

Synopsys announced its plans for expanding its processor intellectual property portfolio with the new RISC-V ARC-V family.

Given that they are using a bit sequential RISC-V design, I wonder if they are using SERV or at least drawing inspiration from it.

SiFive's RISC-V CPU cores will sit at the heart of NASA's future spaceflight processor.

The semiconductor industry produces many kinds of distinct processors, but RISC-V startup Ubitium says it’s working on a single architecture that can rule them all. Emerging from stealth ...

Verifying an SoC is very different than verifying a processor due to the huge state space in the processor. In addition to the tools needed for an SoC, additional tools are required for a step and ...

Bluespec Inc. today announced its new MCUX RISC-V processor that makes it easy for developers to implement custom instructions and add accelerators to ...

According to SiFive, its engineers enhanced the two designs with a new co-processor interface. The technology will make it ...

AI is risky business A group of Chinese scientists has published (PDF) a paper titled Pushing the Limits of Machine Design: Automated CPU Design with AI in which they tell the epic adventure of ...